
88
XMEGA A [MANUAL]
8077I–AVR–11/2012
Bit 6:2 – PSADIV[4:0]: Prescaler A Division Factor
These bits define the division ratio of the clock prescaler A according to
Table 7-2 on page 88. These bits can be written
at run-time to change the frequency of the ClkPER4 clock relative to the system clock, ClkSYS.
Table 7-2.
Prescaler A division factor.
Bit 1:0 – PSBCDIV: Prescaler B and C Division Factors
These bits define the division ratio of the clock prescalers B and C according to
Table 7-3 on page 88. Prescaler B will
set the clock frequency for the ClkPER2 clock relative to the ClkPER4 clock. Prescaler C will set the clock frequency for the
ClkPER and ClkCPU clocks relative to the ClkPER2 clock. Refer to Figure 7-5 on page 83 fore more details. Table 7-3.
Prescaler B and C division factors.
PSADIV[4:0]
Group Configuration
Description
00000
1
No division
00001
2
Divide by 2
00011
4
Divide by 4
00101
8
Divide by 8
00111
16
Divide by 16
01001
32
Divide by 32
01011
64
Divide by 64
01101
128
Divide by 128
01111
256
Divide by 256
10001
512
Divide by 512
10101
Reserved
10111
Reserved
11001
Reserved
11011
Reserved
11101
Reserved
11111
Reserved
PSBCDIV[1:0]
Group Configuration
Prescaler B division
Prescaler C division
00
1_1
No division
01
1_2
No division
Divide by 2
10
4_1
Divide by 4
No division
11
2_2
Divide by 2